1. Field of the System
The present system relates to integrated circuit devices. More specifically, the system relates to field programmable gate array (FPGA) integrated circuits employing static random access memory (SRAM) devices as the programming medium and to providing radiation tolerant SRAM FPGA integrated circuits.
2. Background
FPGA integrated circuits are well known in the art. The programming mechanisms for FPGA devices include antifuses, static random access memory (SRAM) devices and flash memory. SRAM based FPGA integrated circuits usually comprise a SRAM bit having write transistors driving a pass transistor that is used to switch a signal path as part of the configuration of the FPGA integrated circuit. The SRAM bit is used to drive the gate of a pass transistor programming switch that selectively interconnects desired circuit nodes.
Electronic equipment, notably memories, such as static random access memories, is often used in environments where they are or may be subjected to high-energy particles. They may also be subjected to a high-energy electromagnetic pulse field. Such particles may include alpha, beta, gamma and other particles, which have sufficient energy to pass through the outer surface of a case and impact the memory cell itself.
Outer space is one environment in which a memory cell would be subjected to impact from a high-energy particle. When the sun has an energy eruption, which occurs with increasing frequency and intensity during high activity sunspot cycles, the likelihood of impact of a high-energy particle on objects orbiting the earth becomes extremely high. Other environments, such as resulting from a nuclear strike may also produce high-energy particles or a high-energy electromagnetic pulse (EMP).
Many integrated circuits in use today have a reversed biased PN junction that will be shorted due to charges generated by a high-energy particle hit. If this happens to a standard memory cell, the logic state of the cell becomes unknown. It may be inverted, or the data may be erased.
As stated above, when these prior art SRAM-based integrated circuit devices are subjected to environmental radiation, the charge on the SRAM bit may be flipped by the radiation. As is known to those of ordinary skill in the art, if the programming charge stored in the SRAM bit is flipped by exposure to radiation, the state of the switching transistor cannot be guaranteed. When a SRAM bit has its logic state flipped, i.e. from a 1 to a 0 or a 0 to a 1, it may cause the logic cell associated with the SRAM bit to change its function or it could cause a change in the routing connections. For example, a flipped SRAM bit could potentially cause two outputs to be coupled together, which could cause multiple problems in an FPGA including failure due to overheating.
Accordingly, current memory cells must either be protected from the high-energy particle hit by, for example, shielding, or designed in such a way that they are resistant to a change in data state even if hit by a high energy particle or exposed to a high energy EMP. Current memory cells are designed using special circuit techniques that increase the stability of flip-flops and require the addition to the circuit of a register or require much larger circuit designs.
Hence, what is needed is a memory cell designed specifically for an FPGA that is written on start up. What is also needed is a memory cell that does not require a large circuit design.